Dead ends: what was tried and did not work
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Things owners tried on the CMP 170HX (and a few relatives) that did not work, one line each, grouped by area. Each line links to the "What was tried and did not work" section of the page that holds the full entry, with the date, who tried it, the outcome and the sources. Read the full entry before you try the same thing again: several of these cost a card a reset, a reflash or a day.
A dead end here means it was tried, or argued down, and did not work at the time. Some July 2026 dead ends work now; they are in the table at the end, not in the lists.
Before you retry anything
- Ask where a number was measured, and check a claimed lever on a full-speed A100 first: see Rumours and claims to verify#How to judge a claim.
- Check the tool before you believe an odd reading (wrong GPU, a harness bug, a benchmark that returns without computing): see Verifying an unlock and Benchmark protocol.
- Claims that nobody has tested yet are on Rumours and claims to verify, not here.
Compute
- jonpry's sass_fma, rewriting FMA in compiled CUDA kernels (April 2026): never tested on a CMP card and never followed up; moot since the driver unlock lifted the FP32 throttle in July 2026. Compute, data types and missing features
- Patching the PTX JIT compiler so it stops contracting into FMA (April 2026): an AI-made patch gave only part of the expected FP32 rate, and the driver unlock made it moot. Compute, data types and missing features
Memory
- Fold tests that did not evict L2 first (July 2026): re-reading tags without flushing the L2 cache faked a fold at 37 to 38 GiB; discard fold results from before 2026-07-22 taken without eviction. Memory errors and ECC
- Water cooling to make 80 GB stable on the 10 GB card (2026-07-20): proposed and never tested; the failing cards drew only about 80 W, so heat was an unlikely cause. Memory unlock on the 10 GB card
- Heat-gun reflow of a failed HBM2 stack: hours at a range of temperatures on several HBM2 GPUs, no success; the stacks are bonded to the interposer, not soldered to the board. Recovery
- Loading a model several times larger than host RAM (2026-07-24): a 467 GB model would not load on a host with 88 GiB of RAM although most of the weights had reached VRAM; host RAM was the limit, not the cards. Platforms
PCIe
- Vulkan for multi-card inference (2026-07-20): ggml's Vulkan backend sends every card-to-card transfer through host RAM, and a two-card test failed under Vulkan and worked under CUDA; use the CUDA backend. llama.cpp on CMP cards
NVLink
- Reading the "Nvlink Core is being initialized" boot line as NVLink coming up (July 2026): the NVLink module prints it for any GPU as it loads, and the one recorded
nvidia-smi nvlinkrun on these cards said the device does not support NVLink. NVLink
ECC
- The Maxwell-era Quadro VBIOS trick (2026-07-19): flashing a Quadro image with an edited device ID worked on Maxwell cards, but a modified VBIOS does not load on these cards; ECC came through the v0.5 driver patch instead. ECC
VBIOS and flashing
- Flashing a PCIe A100 VBIOS for more p-states and a lower idle (2026-07-26): named as a goal, never tried on a 170HX; the device ID is fused into the die and an A100 image fails the card's boot checks. P-states and idle power
- Flashing the 8 GB card's VBIOS onto a 10 GB card (2026-07-25): the card did not boot on it, edits to the strap table failed an image check, and it was flashed back without harm. 10 GB card
- The VBIOS route to more memory (2026-06-23): the early tool rejected the image, and a forced flash hit hardware write protection; memory was later unlocked in the driver. Unlock history
Drivers and install
- Blaming the HBM for a silent multi-card failure (2026-07-19): the stock module was still loading because depmod kept it over the patched one; the HBM was never the cause. Driver and unlock failures
- A prebuilt llama.cpp CUDA build for another CUDA version (2026-07-24): no error, the weights quietly went to the CPU and it ran out of memory; build for the host's CUDA. llama.cpp on CMP cards
- Killing a stuck llama.cpp run on a rented multi-card host (2026-07-27): the kill left ghost processes and broken driver state, and the host needed a reboot; stop jobs through their own stop path. Instability under load
Tools and measurement
- "Too few SMs after the flash" (2026-06-23): the GUI tool was reading the display GPU in the same machine. Verifying an unlock
- Game frame rates as a check of the compute unlock (2026-07-14): FPS did not change while LLM and CUTLASS throughput did; use a compute benchmark. Verifying an unlock
- Trusting an AI agent's "bricked" verdict (2026-07-15): the agent lost track of what it had done; a reset brought the cards back. Recovery
- A 4 GiB capacity reading (2026-07-22): the test harness cut a 64-bit size to 32 bits; the same card measured 39.67 GiB the next morning. Verifying an unlock
- Estimating multi-card throughput with an AI model (2026-07-27): the posted 4- and 8-card figures were estimates, not measurements; a pessimistic counter-estimate was wrong too, against an eight-card run measured the same day. Benchmarks
- cuBLAS with the 16F compute type and float alpha and beta (2026-07-27): it reported 10,748 TFLOPS because the GEMM returned at once without computing. Benchmark protocol
- A BGA reball checked with MODS only: MODS reported no errors, yet nvidia-smi hung on the card; after board rework, test with the driver and a real workload. Recovery
Cooling and power
- Clock ceilings above 1,650 MHz (2026-07-27): the silicon tops out at about 1,604 to 1,614 MHz with +350, so higher ceilings bought nothing, and +375 at a 1,700 MHz ceiling hung the GPU. Undervolting and power limits
- Raising the power limit to 300 W on its own (July 2026): on a dense GEMM the card's voltage-frequency curve held it at about 190 to 200 W; extra watts help only once an offset lets the core use them. Undervolting and power limits
Other cards
- The 170HX FMA workaround on a CMP 90HX (2025-04-08): FP32 fell from 0.710 to 0.355 TFLOPS in OpenCL-Benchmark. CMP 90HX unlock hub
- Hidden HBM on the CMP 100HX, the 170HX way (2026-06-25): argued down, never probed; the 100HX disables whole stacks instead of hiding layers of the stacks it uses. Other CMP cards and other NVIDIA GPUs
- An AI-generated 90HX compute-unlock guide (2026-07-27): its patch set an RTX 4090 device ID on a card that reports another one, and it did not work. CMP 90HX unlock hub
Once a dead end, now working
According to the Consensus-Protocol research wiki, which its author calls unverified, its snapshot of late July 2026 listed the items below as dead ends or unsolved. Later work on the server made them work; the right-hand columns say what our page shows and credit the people who did it. Details, conditions and risks are on each page. Source: repo github.com/Consensus-Protocol/cmp170hx by Consensus-Protocol on GitHub
| Late July 2026 (research wiki) | Working now, per our page | Page | Sources |
|---|---|---|---|
| GPU-to-GPU P2P absent, with no branch that enabled it | bayley_w's cmpunlocker fork moved real bytes P2P across 4 GPUs on 2026-08-08 (Proven on the page). A static BAR1 build later measured 5.30 GB/s each way and 1.69 to 1.71 us between two 8 GB cards (2026-09-14). It needs the 64 GB BAR1. | P2P | Source: repo github.com/bayley/cmpunlocker by bayley on GitHub, posted by @bayley_w, 2026-08-08 Source: repo github.com/satspace-cpu/cmp170hx-linux-p2p by satspace-cpu on GitHub, posted by @roman_sat, 2026-09-14 |
| ECC fused off with no known lever, set aside in mid-July | Hardware ECC worked, software only and reversible, on 2026-08-24, and cmpunlocker v0.5 shipped software-based ECC on 2026-10-04. "Enabled" is Proven on the page; whether it corrects VRAM errors is contested. | ECC | Source: @scallion_9883, 2026-08-24 Source: @_j3ns, 2026-10-04 |
| PCIe Gen3: no Gen3 link had trained on any card | lxwx trained Gen3 on a 10 GB card on 2026-10-12, and mrpandagod reports Gen3 and Gen4 on 10 GB cards, both after the permanent RIR fuse burn. The 8 GB card still cannot reach Gen3. | PCIe Gen3 on the 10 GB card | Source: @djpandaman, 2026-10-11 Source: @lxtend, 2026-10-12 |
| The 300 W VBIOS: little gain, and no way to flash it from the OS without a chip clip | On the 250 W image 92.00.67.00.01 the GPC and memory offset range is 0 to 0, so no undervolt applies. Flashing the 300 W image 92.00.6D.00.0A with nvflash opens it to -1000 to +1000 (Proven on the page). The lab flashed eight cards in one night; with a +160 offset, inference gained 3 to 9%. | Flashing the 300 W VBIOS | Source: @mrpec, 2026-08-01 Source: @darkmaniac7, 2026-10-31 (lab notes) |
| No card past 70 SMs; every route to the disabled clusters latched | cmpunlocker's SMs branch took both cards from 70 to 74 SMs on 2026-09-24 (Proven on the page). On the 10 GB card mrpandagod went from 74 to 122 SMs, and lxwx reached 128 SMs at full performance, after the RIR fuse burn. 74 is still the ceiling on the 8 GB card. | Full SM unlock | Source: @jma1753, 2026-09-24 Source: @_j3ns, 2026-09-24 Source: @djpandaman, 2026-10-09 Source: @lxtend, 2026-10-17 |