Compute, data types and missing features

The CMP 170HX is a GA100 part, the A100's sm_80 architecture with fewer SMs enabled: 70 SMs on a standard unlock (more with the Full SM unlock). Its tensor cores work and do BF16, FP16, TF32 and INT8; there is no FP8 or FP4 hardware, and whether INT4 runs at its full rate is disputed. The card has no video encoder or decoder, no RT cores, no ECC on its HBM, and only one MIG instance. Most figures below come from 8 GB cards unlocked to 64 GB with cmpunlocker. Few runs share a method or tool, so read every number with its benchmark, clocks and power limit. Head-to-head comparisons with other GPUs are on How the 170HX compares; which quant formats to run follows from this page and is on Quantization on the 170HX.

Data types in hardware

No FP8 or FP4 on sm_80; INT8 runs in hardware; whether the INT8 tensor rate stays gated is contested

The missing formats, in the order members raised them:

2026-07-23: arnold civardagezen noted the 170HX has no NVFP4 support. quark2world added "Not even fp8" and "Can do INT8 in hw", and claimed NVFP4 gives roughly a 1.75x to 2.5x speedup on Blackwell. Source: @a.civardagezen, 2026-07-23
Source: @quark2world, 2026-07-23
2026-08-02: DeeJay hit problems with DeepSeek because its weights default to FP8, which the 170HX tensor cores do not support. CUTE noted the A100 has no FP8 tensor cores either, and DeeJay agreed the issue affects all SM_80 cards. programmerboi said DeepSeek defaults to MXFP4, which giaki3003 said SM_8X handles poorly. GLM 5.2 avoids this because it runs in BF16 by default, and INT8 is the native fast path. Source: @deejay9983, 2026-08-02
Source: @cute_sc2, 2026-08-02
Source: @programmerboi, 2026-08-02
Source: @giaki3003, 2026-08-02
Source: @meatsus, 2026-08-02
2026-08-12: meatsus: the CMP cards are missing FP8 and FP4 in hardware. bigfoot noted NVFP4 is a Blackwell format, and You Know Who said NVFP4 models still run on these cards because the engine falls back to another path. Source: @meatsus, 2026-08-12
Source: @bigfoot1144, 2026-08-12
Source: @squishysquare, 2026-08-12
2026-08-28: quark2world said 64 GB without NVFP4 will slowly become a bottleneck, because INT4 support cannot replace that speedup. Source: @quark2world, 2026-08-28
Source: @cressida1881, 2026-08-28
2026-10-14: ST wished for an FP8-based quant format. cibernox: CMPs (SM80) do not support FP8, and Miséricorde added it would be slower because of the bigger source quant. cibernox countered that if only about 30% of the bandwidth is used because kernels are compute-bound, a larger quant may not be much slower. Source: @cibernox, 2026-10-14
Source: @wakeupmbrc1, 2026-10-14
Source: @stcord, 2026-10-14

On the INT8 tensor-core rate after the unlock, the two sides:

2026-08-18: machinezero asked whether IMMA (INT8 tensor-core MMA) works, and giaki3003 said of course. Petri Krohn said INT8 should hit about 400 TOPS on the tensor cores, and floated that INT8 with Hadamard rotations (Walsh-Hadamard transform, TurboQuant) could match FP8 quality, though he knows of no LLM engine using that outside the KV cache. Source: @petrikrohn_26497, 2026-08-18
Source: @machinezer0, 2026-08-18
Source: @giaki3003, 2026-08-18
2026-10-25: a lab sweep of the community repos found project-maya issue #281 reporting that INT8 tensor-core throughput stays gated after the memory and SM unlock: about 50 TOPS INT8 against 155 TFLOPS FP16. The Consensus-Protocol wiki lists it as unexplained, and an upstream note says INT8 gating is not a VBIOS field. Source: repo github.com/mw00/project-maya by mw00 on GitHub, posted by @darkmaniac7, 2026-10-25 (lab notes)
Source: repo github.com/Consensus-Protocol/cmp170hx by Consensus-Protocol on GitHub, posted by @darkmaniac7, 2026-10-25 (lab notes)

acedogblast's OpenCL result of INT8 at only 4x FP32 and Desire's dp4a figure of 49.821 TIOPs (both below) measure non-tensor paths, which may explain part of the gap. Nobody has posted a direct INT8 tensor-core measurement on the 170HX.

Contested 8 GB and 10 GB

INT8 unlocked at about double FP16; INT4 still about equal to INT8

Wouter noted that locked INT8 on the 170HX was around 12.5 TIOPS (useless), while unlocked BF16/FP16 is about 160 TFLOPS, so fully unlocked INT8 should be about double that. He reported on 2026-07-21 that INT8 is now unlocked but INT4 is still roughly the same as INT8, half of the expected INT4 throughput, and asked whether W8A8 is faster than W8A16. chris.via.egnatia answered that the 170HX supports INT8 as standard. A full INT4 unlock was flagged as a future goal.

Reported 8 GB and 10 GB
Source: @woezie, 2026-07-21
Source: @chris.via.egnatia, 2026-07-21

Does GA100 have INT4 tensor cores?

DeeJay (2026-08-27): the cards have no INT4 tensor cores but do have INT8, so INT8 weights may be as fast as INT4. Source: @deejay9983, 2026-08-27
Petri Krohn (2026-08-28): GA100 has INT4 tensor cores but no NVFP4, citing page 15 of the A100 whitepaper: INT8 624 / 1,248 TOPS and INT4 1,248 / 2,496 TOPS (dense / 2:4 sparse). He believes FP64, FP32, BF16, FP16, INT8 and INT4 share the tensor cores at double the throughput per halving of bits, with separate CUDA cores. Source: @petrikrohn_26497, 2026-08-28
Phoenix17 (2026-08-28): INT4 runs packed on the same 8-bit tensor cores. Source: @phoenixone7, 2026-08-28

These are A100 specifications, not measurements on the 170HX. Wouter's observation that INT4 runs at about the INT8 rate is in the entry above.

Contested

FP16 runs 4:1 against FP32 and was never restricted on GA100

Petri Krohn: GA100 has a 4:1 FP16-to-FP32 ratio, and the 170HX's non-tensor FP16 was never restricted, giving about 50 TFLOPS FP16 even on a stock card that has not been unlocked. He credits this for the stock card's strong token generation. He says all new consumer GPUs (he believes including the RTX 3080 and 3090) have FP16 artificially limited to 1:1 with FP32, and he found no register on GA100 that would apply such a limit, citing a community GA100 fuse and register reference table.

Reported 8 GB and 10 GB
Source: @petrikrohn_26497, 2026-08-08

Theory: Walsh-Hadamard rotation plus INT4 tensor math (W2A4 or W3A4)

Petri Krohn (2026-09-22) argued inference will move to a Fast Walsh-Hadamard transform of both weights and activations, with the math done on INT4 tensor cores and 2-bit or 3-bit weights (W2A4 or W3A4), citing about 800 TOPS INT4 on the 170HX. He proposed adding a generic FWHT to llama.cpp to rotate and quantize activations on the fly, and said the optimal 2-bit encoding is +3/+1/-1/-3 rather than Bonsai 2's ternary values, because zero loses its special meaning once weights are Hadamard-transformed. Untested.

Theory
Source: @petrikrohn_26497, 2026-09-22

Tensor cores and measured throughput

Tensor cores work on the 170HX

Amogh asked on 2026-07-19 whether the tensor cores are disabled on the 170HX, while deciding whether to add a Pearlhash benchmark. Far posted a screenshot and said they appear to work properly, and giaki3003 also did not think they are disabled. The same day arnold civardagezen said the tensor cores "don't currently work", which would hurt prefill; that claim was unverified and is contradicted by the measured tensor throughput below. On 2026-08-03 programmerboi confirmed the tensor cores work and said a table he had seen gave about 220 TFLOPS BF16 (second-hand; the original table and its author are not in the export).

Proven
Source: @simba6959, 2026-07-19
Source: @lunaroseoc, 2026-07-19
Source: @jiacheng_liu, 2026-07-19
Source: @a.civardagezen, 2026-07-19
Source: @farawaythrower, 2026-07-19
Source: @_j3ns, 2026-07-19
Source: @giaki3003, 2026-07-19
Source: @programmerboi, 2026-08-03
Source: @a.civardagezen, 2026-08-03

Are the tensor cores fully unlocked?

A thread on 2026-07-30:

acedogblast measured INT8 at only 4x the FP32 rate with opencl-benchmark and concluded the tensor cores are not fully unlocked (the A100 does 32x). Source: @acedogblast, 2026-07-30
gym disagreed: tensor throughput is much faster than a 3090 and only vector and scalar FP32 is slower. The tensor cores work in his training workloads at about 180 BF16 TFLOPS, and asked whether any compute part is still locked, he said not to his knowledge. Source: @jimtjames, 2026-07-30
giaki3003 noted the 3090 has better FP32, and LetterC67 and asm64 posted benchmarks showing the 170HX ahead. Source: @giaki3003, 2026-07-30
Source: @leesle., 2026-07-30
Source: @letterc67, 2026-07-30

Contested

Measured tensor throughput: about 150 to 210 TFLOPS FP16/BF16 dense, a 202.1 TFLOPS ceiling

The arithmetic ceiling for BF16 dense is 202.1 TFLOPS = 2048 x 70 SM x 1410 MHz. On paper (CUTE, 2026-08-07): the A100 does about 78 TFLOPS FP16 and 312 TFLOPS FP16 tensor; the CMP 170HX about 47 TFLOPS FP16 and 201 TFLOPS FP16 tensor. asm64 put it the same way: the A100 is 312 TFLOPS BF16 and the 170HX has 0.64 of its SMs, so about 199 TFLOPS theoretical.

Measured figures:

gym (jimtjames): about 180 TFLOPS BF16 on an unlocked card with no clock changes and about 200 with a +250 clock offset; torch GEMM at 180 to 210 TFLOPS on the CMP (he said the CMP figure needed an undervolt) against 240 to 260 TFLOPS on an A100. He presumes the A100 cannot sustain high clocks across its 108 SMs on its power budget. He also noted that a TFLOPS chart RedPandaMining posted used structured-sparsity (2x) figures for the consumer GPUs, not dense ones; meatsus thought that chart's unlocked 170HX figures looked low.
DeeJay: 152 TFLOPS FP16 with his script on rented unlocked cards (HBM about 1600 GB/s).
Con3po's notes (2026-09-09), BF16: 164.4 TFLOPS from mma_bf16bf16f32 (both tile shapes); 171.4 on 8 cards on 2026-07-27 with driver 610.43.02, Gen1 x4 and no cap mod; 180.09 from a torch GEMM at 4096 squared; 183.75 from a 4096 cubed sweep; 188.1 to 192.7 from gemm_probe.cu at n=8192 with FP32 accumulate.
gpu-burn, cuddylac997 on 10 GB cards (2026-08-11): about 12,200 to 12,250 GFLOP/s in the default mode and about 88,000 to 90,000 GFLOP/s per card with gpu_burn -tc 60 (0 errors, about 355,000 aggregate on 4 cards), drawing 216 to 263 W at 100% utilisation with clocks drooping to 1200 to 1290 MHz at the 250 W limit. His arithmetic: 70/108 of A100 FP16 is about 202 TFLOPS, halved for gpu-burn's FP32-accumulate mode is about 101,000, times about 88% for clock droop is about 89,000, matching the measurement.
gpu-burn, DeeJay on 8 GB cards: about 155,000 GFLOP/s per card at a 180 W power limit (FP16 tensor). How he ran it is not recorded, so the two gpu-burn figures are not directly comparable.
Other figures quoted in the threads: DaLZy cited 13 TFLOPS FP32 but 87 TFLOPS TF32, and Petri Krohn 400 TOPS INT8 tensor.

The tensor cores are sm_80 like the A100's and work in vLLM, and Marlin kernels make FP8 models usable. For a tool that measures these peaks on your own card, see Mmapeak and 170tune.

Proven 8 GB and 10 GB
Source: @acedogblast, 2026-07-30
Source: @jimtjames, 2026-07-30
Source: @giaki3003, 2026-07-30
Source: @leesle., 2026-07-30
Source: @letterc67, 2026-07-30
Source: @jimtjames, 2026-07-30
Source: @leesle., 2026-07-30
Source: @redpandamining, 2026-07-30
Source: @deejay9983, 2026-07-30
Source: @meatsus, 2026-07-30
Source: @cute_sc2, 2026-08-07
Source: @jimtjames, 2026-08-07
Source: @dalzyyy, 2026-08-07
Source: @quark2world, 2026-08-07
Source: @petrikrohn_26497, 2026-08-07
Source: @overrflow, 2026-08-07
Source: @cuddylac997, 2026-08-11
Source: @deejay9983, 2026-08-11
Source: @giaki3003, 2026-08-11
Source: @con3po7016, 2026-09-09
Source: @redblood_, 2026-09-09

The compute unlock measured: FP32 from 414 to 13,173 GFLOPS on an 8 GB card

Kai measured the compute unlock on an 8 GB card with amoghmunikote/cmpunlocker: FP32 rose from 414 GFLOPS locked to 13,173 GFLOPS unlocked. The memory unlock reached 64 GB nominal (63.5 GB usable) and passed a real write and read-back test with 0 errors. It is a clean before-and-after data point for the compute unlock; how to check your own card is on Verifying an unlock.

Reported 8 GB
Source: @honest_swan_40057, 2026-08-13

Is FP32 accumulate or FP32 FMA throttled after the unlock?

After cuddylac997 attributed the halved gpu-burn tensor numbers to FP32 accumulate (entry above), a thread on 2026-08-11:

bayley_w asked whether FP32 accumulate is locked, which would change the value proposition. Source: @bayley_w, 2026-08-11
DeeJay and giaki3003 said yes. Source: @deejay9983, 2026-08-11
Source: @giaki3003, 2026-08-11
clee: "FP32 FMA is severely restrained". Source: @c133, 2026-08-11
bayley_w then wrote his own benchmark and measured 150 TFLOPS at 250 W in both cases. Source: @bayley_w, 2026-08-11
gym: "For the 170HX there's no 32 bit tensor core accumulator nerf". He measured about 180 TFLOPS on torch GEMM out of the box against about 260 on an A100, and said the FMA throttle exists without the unlock and the unlock removes it. Source: @jimtjames, 2026-08-11

Contested

FUSE_SS_FMLA32 and FUSE_SS_IMLA4: the FP32-accumulate halving on consumer Ampere

Petri Krohn: consumer Ampere cards (RTX 3080 and 3090) have the speed-select fuses FUSE_SS_FMLA32 and FUSE_SS_IMLA4 set, which halves the matching compute; the FP32-accumulate tensor limit on those cards comes from FUSE_SS_FMLA32. gym gave the numbers: RTX 3090 BF16 with FP32 accumulate is 71.2 TFLOPS on the datasheet against 149.7 for the A40, and real torch GEMM benchmarks show about 76 against about 122 TFLOPS. gym asked whether this limit is software-based and could be reached through the unlock; giaki3003 thought it most likely is but may not be easily reachable, and Humvee55 confirmed the same applies to GA10x as to the CMP cards. Nobody has tested it as an unlock target. Fuse readouts for the 170HX itself are on Fuses and floorsweep maps.

Reported
Source: @petrikrohn_26497, 2026-08-08
Source: @jimtjames, 2026-08-08
Source: @giaki3003, 2026-08-08
Source: @scallion_9883, 2026-08-08

OpenCL benchmark of an unlocked 64 GB card at Gen2 x16 (driver 610.43.03)

Desire posted an OpenCL benchmark of an unlocked card the day after his capacitor mod (PCIe x16 capacitor mod): device name "NVIDIA Graphics Device", driver 610.43.03 (Linux), 70 CUs at 1410 MHz (4480 cores, 12.634 TFLOPs/s), 65052 MB VRAM, buffer limit 16263 MB.

Compute: FP64 6.553 TFLOPs/s (1/2 rate), FP32 13.149, FP16 49.660, INT64 2.604 TIOPs/s, INT32 12.998, INT16 11.960, INT8 dp4a 49.821.
Memory bandwidth: coalesced read 1574.40 GB/s, coalesced write 1407.26 GB/s, misaligned read 827.30 GB/s, misaligned write 144.05 GB/s.
PCIe: send 6.09 GB/s, receive 5.43 GB/s, bidirectional 5.59 GB/s at Gen2 x16.

Reported 8 GB
Source: @desire13.37, 2026-08-19

Memory bandwidth and cache

HBM bandwidth: about 1666 GB/s stock, about 1900 GB/s with a driver overclock

Studebaker posted a stock-timings bandwidth result that arnold civardagezen read as matching 1666 GB/s (2026-08-03); programmerboi elsewhere cited about 1.7 TB/s. asm64 (2026-08-06) said his driver build can overclock both GPU core and memory: about 1900 GB/s memory bandwidth "is totally doable without any issues if cooling is decent", a core overclock gives about +5 to 10% prefill, and P2P reduces latency, which helps latency-sensitive pipeline parallel. Beam (10 GB card) worried that pushing memory would require shortening the DRAM refresh interval, which per a paper could cost up to 30% throughput. Clock and power tuning: Undervolting and power limits.

Reported
Source: @_studebaker_, 2026-08-03
Source: @a.civardagezen, 2026-08-03
Source: @leesle., 2026-08-06
Source: @beamreaching1, 2026-08-06

HBM microbenchmarks: about 1 TB/s warm at small sizes, falling toward 500 GB/s at larger sizes

Ryko's CUDA microbenchmarks showed a CMP 170HX at ca=570.13, cg=575.63, cs=564.48 and cn=565.35 GB/s against an RTX 3090 at about 788 to 801 GB/s, and he noted that despite roughly 14% better INT8 compute the CMP was slower than his other cards in llama.cpp. matstatman ran the same arabel1a/gpu-micro-bench (it needs the CUDA toolkit's nvcc on PATH) and got the same pattern as Ryko's two cards: BW_WARM reaches about 1 TB/s at small sizes, then falls toward 500 GB/s at larger sizes. jonathan posted a screenshot showing his card's HBM is faster. Studebaker pointed to the HBM matrix document in 170tune for this behaviour. These figures sit well below the 1.5 TB/s streaming numbers above; the access pattern and the card's state explain part of the gap.

Proven
Source: @vektor_prime, 2026-08-14
Source: @matstatman, 2026-08-14
Source: @jonathan.quai, 2026-08-14
Source: @_studebaker_, 2026-08-14

L2 cache is 32 MB (A100: 40 MB)

York Zhang noticed that TechPowerUp lists a different L2 cache size for the 170HX than for the A100 PCIe 40GB. gym read torch.cuda.get_device_properties(0).l2_cache_size on a 170HX and got 32 MB, against 40 MB on the A100; Rickcal also believed it was 32 MB. Ari noted that the CUDA driver attribute CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE returns the size in bytes. No microbenchmark was run.

Reported
Source: @yorkzhang_37447, 2026-07-25
Source: @jimtjames, 2026-07-25
Source: @rrickk420, 2026-07-25
Source: @justarionlyari, 2026-07-25

Where the card stands

About 60 to 70% of an A100, "1.5 TB/s Ampere", power-limited

ProfDD (2026-07-24): a 170HX running LLMs performs at about 70% of an A100, with the limitation of PCIe 1.0. Rickcal separately posted "12.5 TFLOPS FP32 and 6.2 TFLOPS FP64" without stating the setup or whether the card was unlocked.
quark2world (2026-08-07): about 66% of an A100 in nearly everything he tested, including large-context agentic LLM inference, with about 33% of the compute cores disabled. lrdimm (2026-08-19) also said about 66% of an A100 "right now", comparable to Ampere cards but with HBM2e.
DeeJay (2026-08-22), after segmond noted popular articles calling the card an A100: it is about 60% of a GA100 with some TFLOPs still missing, sold for $1500 ("thats the part they leave out"). A post on X by TeksEdge was cited as one driver of the price rise.
ST (2026-08-23): the 170HX is not ordinary Ampere but "1.5tb/s ampere"; its HBM2e bandwidth is its strength for LLM decode despite the older architecture.
quark2world (2026-08-28): the CMP cards are slow in many workloads, where a 4090 or 5090 beats them by far, and they are heavily limited by power draw even with a mining BIOS at the full power limit. cressida summed the card up as roughly 150 to 200 W for 64 GB of VRAM, and at around $2k quark2world thought a 4090 the better buy for many users.
Busulle (2026-10-02) asked whether a 74-SM unlock makes the card about 68% of an A100 (74 of 108 SMs). CUTE agreed and said it is a little more, because the CMP runs higher clocks and more power per SM; c133 had no real A100 to compare.

These are estimates without a shared method. The longer comparison is on How the 170HX compares.

Reported 8 GB and 10 GB
Source: @profdd, 2026-07-24
Source: @rrickk420, 2026-07-24
Source: @cute_sc2, 2026-08-07
Source: @jimtjames, 2026-08-07
Source: @dalzyyy, 2026-08-07
Source: @quark2world, 2026-08-07
Source: @petrikrohn_26497, 2026-08-07
Source: @overrflow, 2026-08-07
Source: @lrdimm, 2026-08-19
Source: @bayley_w, 2026-08-19
Source: @sh.ad, 2026-08-19
Source: @segmond, 2026-08-22
Source: @deejay9983, 2026-08-22
Source: @matstatman, 2026-08-22
Source: @artistosu, 2026-08-22
Source: @stcord, 2026-08-23
Source: @quark2world, 2026-08-28
Source: @cressida1881, 2026-08-28
Source: @busulle, 2026-10-02
Source: @cute_sc2, 2026-10-02
Source: @c133, 2026-10-02

Against the RTX 3090 and RTX 8000: similar compute, more memory and bandwidth, fewer features

2026-07-26: asked about a 48 GB Quadro RTX 8000 against an unlocked 8 GB card (64 GB), diabeetee would pick the CMP, especially for a single-card setup. ian j'j'j replaced two RTX 3090s with one 170HX 8 GB card, since 64 GB fit his needs better, with close to $1000 left over. Source: @diabeetee, 2026-07-26
Source: @mrmannyatx, 2026-07-26
Source: @wxy3657, 2026-07-26
2026-07-30: asked whether the 170HX is a 3090 with more VRAM, Luna said "pretty much". makesier (weicj) agreed for compute but pointed to the much faster HBM2e bandwidth; Arcanum called it a nerfed A100. Source: @rogersmith2026, 2026-07-30
Source: @lunaroseoc, 2026-07-30
Source: @makesier, 2026-07-30
Source: @_arcanum_, 2026-07-30
2026-08-09: what a 3090 can do that a 170HX cannot, per bayley_w: it works on Windows and has NVENC, RT cores and raster engines, idles properly and has PCIe 4.0 x16; the 170HX has no fans of its own. His rule of thumb is a 3090 with extra VRAM, though not directly comparable because it has no raster engine. On price, robbbbbb7973 put the 170HX at about 2x a 3090 and a gamble on the unlock, while mfj4 saw them near 1:1. Aeiou: at 2x the price you get slightly more than double the memory with roughly similar compute; ju5t5omedude added gaming as a reason to keep a 3090. Source: @mfj4, 2026-08-09
Source: @bayley_w, 2026-08-09
Source: @robbbbbb7973, 2026-08-09
Source: @91d5a66bffc978331fac75b68fa86aba, 2026-08-09
Source: @ju5t5omedude, 2026-08-09
2026-08-19: giaki3003 held that the 3090 has more compute and the 170HX's advantage is bandwidth. DaLZy countered that the 170HX has far more tensor throughput, citing 808 INT4 TOPS for the 170HX against 570 for the 3090, and said GA100 and GA102 SMs differ so much that spec comparisons mislead. Vcore noted the winner depends on whether the software uses the tensor cores. Source: @giaki3003, 2026-08-19
Source: @dalzyyy, 2026-08-19
Source: @vcore2191, 2026-08-19
Source: @letterc67, 2026-08-19
2026-09-21: xtj7 gets nearly the same LLM performance from one 170HX as from 2x RTX 3090 at less than half the power draw; turbine explained that the 3090 is GA102, whose smaller tensor cores need higher clocks for the same throughput. Source: @xtj7, 2026-09-21
Source: @turbine, 2026-09-21

More on these comparisons: How the 170HX compares.

Contested 8 GB and 10 GB

What the card is and is not for

CUTE's summary (2026-08-08): the unlocked 170HX is for AI inference and training on a small budget. It is not for gaming, since critical hardware parts are missing, not for Blender, not for video encoding (no NVENC), and not for anyone who wants plug and play. DaLZy said SGLang and vLLM run about twice as fast as llama.cpp on these cards and that the sm_80 tensor cores work in vLLM exactly as on the A100. quark2world said the HBM makes batch image generation far faster than on a 3090 (Image, video, voice and training).

Reported 8 GB and 10 GB
Source: @cute_sc2, 2026-08-08
Source: @dalzyyy, 2026-08-08
Source: @quark2world, 2026-08-08

Missing features

No NVENC, NVDEC or NVJPG: video and JPEG decode must run elsewhere

NVENC: Samuel Hayden (2026-07-27) said NVENC is disabled; it is not available by default even if the hardware exists. On 2026-08-03 Redblood asked whether the card keeps an AV1 encoder: CUTE noted the A100 has no encoder at all, only decoders, K2V that AV1 encode belongs to Ada, and programmerboi confirmed the card is Ampere. bayley_w (2026-08-13): no GA100 ever had NVENC.
NVDEC and NVJPG: Humvee55 said NVDEC is also shut off in the 170HX firmware as far as he could tell, and K2V said re-enabling it for ffmpeg runs into the same unsolved problem as other fused features: there is no software override for it. bayley_w (2026-08-13) reported no usable NVDEC, "locked away at the same level as pcie 3.0 and nvlink", and after checking no NVJPG either. Amogh (2026-08-18): "NVDEC is fused off on the CMP 170HX. There isn't any software path at the moment."
What to do instead: run video or JPEG decode for training pipelines on the CPU or a companion GPU. bayley_w notes low-resolution h264 CPU decode can be competitive (likely over 1 kHz at 512x512 on a 44-core Broadwell), and turbine pointed out the Tesla M10 has four NVDECs (one per vGPU, h264 only) for about $72. On 2026-08-19 bayley_w said the card runs Frigate detection (YOLOv8) but camera decoding needs something like a Quadro P1000 or CPU libx264; for 30 to 50 camera feeds Smit suggested a Quadro or an NVENC/NVDEC-capable GeForce and linked NVIDIA's support matrix, Schaka noted Intel QuickSync is best for encode quality, and bayley_w added that Intel cards are fussy about resizable BAR at boot even on recent datacenter platforms.

Plan on a second card for video decode or transcoding.

Proven 8 GB and 10 GB
Source: @samuel_hayden., 2026-07-27
Source: @cute_sc2, 2026-07-27
Source: @redblood_, 2026-08-03
Source: @redblood_, 2026-08-03
Source: @k2v0008, 2026-08-03
Source: @cute_sc2, 2026-08-03
Source: @scallion_9883, 2026-08-03
Source: @programmerboi, 2026-08-03
Source: @bayley_w, 2026-08-13
Source: @turbine, 2026-08-13
Source: @_j3ns, 2026-08-18
Source: @spiralglide, 2026-08-18
Source: @c133, 2026-08-18
Source: @bayley_w, 2026-08-19
Source: @sh.ad, 2026-08-19
Source: @smit1237, 2026-08-19
Source: @schakaqt, 2026-08-19

No RT cores on the 170HX

On 2026-09-15 emogop asked for RT cores to be unlocked on CMP cards. larrylegend answered that the 170HX most likely has no RT cores at all, because it is based on the A100, not the 3090, and that Amogh's focus is the 170HX only. RT work on the CMP 90HX is on CMP 90HX unlock hub.

Reported 8 GB and 10 GB
Source: @emogop, 2026-09-15
Source: @larrylegend3504, 2026-09-15

ECC is off on every variant; enabling it would not cost capacity

Arcanum stated on 2026-07-30 that no CMP 170HX variant has ECC. CUTE said on 2026-09-04 that ECC does not reduce capacity. On 2026-09-26 CUTE said 10 GB cards with ECC enabled do not lose capacity because ECC is built into HBM2E, and claimed HBM2 has no built-in ECC; regaly countered that the V100 uses HBM2 and has ECC. djpandaman said enabling ECC on HBM never causes a card to lose capacity, and regaly put it the other way round: disabling ECC never gives extra capacity, because ECC uses extra bits of the full word that cannot be rerouted for data. They agree on no capacity loss and disagree only on whether HBM2 has ECC. The register evidence that ECC is off is on ECC.

Reported 8 GB and 10 GB
Source: @artistosu, 2026-07-30
Source: @_arcanum_, 2026-07-30
Source: @moliminous, 2026-07-30
Source: @reggie7756, 2026-09-04
Source: @_maitops, 2026-09-04
Source: @cute_sc2, 2026-09-04
Source: @cute_sc2, 2026-09-26
Source: @reggie7756, 2026-09-26
Source: @djpandaman, 2026-09-26

Does missing ECC matter, and could it hide single-bit errors?

Without ECC a failing HBM cell is not auto-retired as on datacenter GPUs, so bit flips can silently corrupt model output or cause failures that are hard to trace. How much that matters:

2026-08-06: DaLZy: "you might end up chasing ghosts"; he proposed checking each GPU with a Vulkan memory test, or by running a Qwen 27B INT8 instance per card to see which one degrades. DeeJay and giaki3003 said finding a way to enable ECC would be huge. segmond argued a single flipped weight bit matters little for single-user inference but is bad for providers serving many users. After real HBM errors turned up on 2026-08-08, Studebaker listed "Fix ECC" as the next wish. Source: @dalzyyy, 2026-08-06
Source: @deejay9983, 2026-08-06
Source: @giaki3003, 2026-08-06
Source: @segmond, 2026-08-06
Source: @_studebaker_, 2026-08-06
2026-08-08: SkirtChaser suggested the single-bit memory errors seen on some cards would probably be corrected if ECC could be enabled, but doubted ECC would help a card that crashes the system. ju5t5omedude wondered how A100s behave with ECC disabled. Source: @skirtchaser, 2026-08-08
Source: @ju5t5omedude, 2026-08-08
Source: @_studebaker_, 2026-08-08
2026-08-30: meatsus asked whether renting the cards long term for AI is risky because memory errors can break inference. giaki3003 said nobody renting a 170HX cares about ECC and nobody serious rents non-ECC machines for inference anyway. Phoenix17 disagreed: ECC can matter a lot for long-horizon training or scientific work where one error ruins the result, though probably not for most inference, and it is his second priority after P-state control even with both his cards passing memory tests. Source: @meatsus, 2026-08-30
Source: @giaki3003, 2026-08-30
Source: @phoenixone7, 2026-08-30
Source: @ins_mniac, 2026-08-30
2026-09-21: darcidride hoped his 3 memory-error cards might become usable if an ECC unlock arrives. Source: @darcidride, 2026-09-21
Source: @cibernox, 2026-09-21
Source: @quark2world, 2026-09-21
Source: @deced_123, 2026-09-21

No ECC enablement has been demonstrated. Testing for and living with bad HBM: Memory errors and ECC.

Contested 8 GB and 10 GB

MIG gives one instance only: the syspipe mask reads 0xfe and appears fused

ropuls updated Consensus-Protocol/cmp170hx PR #3 after a bare-metal look at MIG (2026-10-03). The device-info table (PTOP) exposes only one GRAPHICS engine (GR0), both through the driver and read raw from BAR0; MAX_MIG_ENGINES is 8, so that is not the gate. A register that looks like the syspipe disable mask (0x8203a4, with a copy at 0x820e30) reads 0xfe on both his cards and ignores host writes, so it looks fused rather than unprogrammed, and MIG mode also applies a stricter TPC mask (56 SMs by mask). His conclusion: MIG gives one big instance only, it is not a driver bug, and no patch or regkey will fix it. Open request: an A100 or GA100 owner doing a read-only BAR0 read of those two registers would confirm the mask attribution.

Reported
Source: @ropuls, 2026-10-03

SR-IOV support unknown

Luna asked whether the 170HX has working SR-IOV, which the A100 supports. Amogh said it might work on the card by itself but he had never checked, including with cmpunlocker; SealClubber recalled that the CMP does not support it. Luna noted that SR-IOV can be enabled through firmware on other products, citing the Intel Arc BMG workstation cards. Nobody has tested it. Passthrough of the whole card: Virtual machines and passthrough.

Theory
Source: @lunaroseoc, 2026-07-20
Source: @_j3ns, 2026-07-20
Source: @sealclubber, 2026-07-20

CMP 170HX · 8 GB card · 10 GB card · Variant comparison · How the 170HX compares · Quantization on the 170HX · Benchmarks · Mmapeak · 170tune · Full SM unlock · Driver unlock · Verifying an unlock · Fuses and floorsweep maps · ECC · Memory errors and ECC · Image, video, voice and training · Undervolting and power limits · Virtual machines and passthrough · CMP 90HX unlock hub · Other CMP cards and other NVIDIA GPUs

Data types in hardware

No FP8 or FP4 on sm_80; INT8 runs in hardware; whether the INT8 tensor rate stays gated is contested

INT8 unlocked at about double FP16; INT4 still about equal to INT8

Does GA100 have INT4 tensor cores?

FP16 runs 4:1 against FP32 and was never restricted on GA100

Theory: Walsh-Hadamard rotation plus INT4 tensor math (W2A4 or W3A4)

Tensor cores and measured throughput

Tensor cores work on the 170HX

Are the tensor cores fully unlocked?

Measured tensor throughput: about 150 to 210 TFLOPS FP16/BF16 dense, a 202.1 TFLOPS ceiling

The compute unlock measured: FP32 from 414 to 13,173 GFLOPS on an 8 GB card

Is FP32 accumulate or FP32 FMA throttled after the unlock?

FUSE_SS_FMLA32 and FUSE_SS_IMLA4: the FP32-accumulate halving on consumer Ampere

OpenCL benchmark of an unlocked 64 GB card at Gen2 x16 (driver 610.43.03)

Memory bandwidth and cache

HBM bandwidth: about 1666 GB/s stock, about 1900 GB/s with a driver overclock

HBM microbenchmarks: about 1 TB/s warm at small sizes, falling toward 500 GB/s at larger sizes

L2 cache is 32 MB (A100: 40 MB)

Where the card stands

About 60 to 70% of an A100, "1.5 TB/s Ampere", power-limited

Against the RTX 3090 and RTX 8000: similar compute, more memory and bandwidth, fewer features

What the card is and is not for

Missing features

No NVENC, NVDEC or NVJPG: video and JPEG decode must run elsewhere

No RT cores on the 170HX

ECC is off on every variant; enabling it would not cost capacity

Does missing ECC matter, and could it hide single-bit errors?

MIG gives one instance only: the syspipe mask reads 0xfe and appears fused

SR-IOV support unknown

Related