Gen2 link retrain
More actions
| Reported 8 GB and 10 GB | |
| Driver | nvidia-open 610.43.02 to 615.71.10 |
|---|---|
| Unlock build | amoghmunikote/cmpunlocker v0.5 |
| Steps | Gen2 link retrain |
| Source | link |
| Confirmations | None yet. |
The stock CMP 170HX links at PCIe Gen1. cmpunlocker raises it to Gen2 on both cards. This is pure software (no fuse burn) and is the ceiling the mainline repo claims; Gen3 is a separate, 10 GB-only story (see PCIe Gen3 on the 10 GB card). Gen2 alone is a 2x bandwidth step over stock Gen1.
Link speed (Gen1 to Gen2) and link width (x4 to x16) are separate problems. Gen2 is software; x16 width needs the hardware capacitor mod on lanes 4-15. Without the caps the maximum width is x4. Source: @djpandaman, 2026-10-17
How it works
The silicon was never fused to Gen1; Amogh's Gen2 enable bypasses a bootstrap by writing XVE_FUSE_OVERRIDE =
0x6, which lets LINK_CAP reach Gen2. There is no physical Gen2-disable fuse (unlike Gen3/Gen4, which are
real fuses). Source: @djpandaman, 2026-10-09
Two pieces in cmpunlocker do it:
pcie-gen2.patchsets the PL link-rate register0x0008c1c0 = 0x00240036and the related fuse
override / XP3G registers; pcie-gen2-probe-retrain.patch handles the retrain.
- An early-boot retrain service (
gen2.service, runs/usr/local/sbin/gen2-hammer). The
Gen2 advertisement window opens for only a fraction of a second when the initramfs-loaded module's booter writes land,
before any normal systemd unit runs, so the hammer loops setpci CAP_EXP+12 on the bridge and GPU (default
600 iterations at 0.05 s) to catch it. Source: @rrickk420, 2026-08-22
The install writes /etc/modprobe.d/cmp-pcie-gen2.conf:
options nvidia NVreg_RegistryDwords="RmForceEnableGen2=1;RMPcieLinkSpeed=0x1"
Verify
nvidia-smi --query-gpu=pcie.link.gen.current,pcie.link.gen.max --format=csv # expect 2,2
sudo ./tools/service.sh verify # cmpunlocker helper
setpci -s <bdf> CAP_EXP+12.w # 0x1042 = Gen2 x4, 0x1041 = Gen1
sudo lspci -s <bdf> -vvv | grep LnkSta
Judge Gen2 by setpci CAP_EXP+12 or lspci LnkSta, not by
nvidia-smi pcie.link.gen.current, which can still report 1 after a successful catch. Recovery boot option
if the service misbehaves: systemd.mask=gen2.service.
Numbers
Gen2 x4 measured about 1.5 GB/s each way, up from about 0.85 GB/s at Gen1 (roughly 1.8x). With the x16 capacitor mod, Gen2 x16 reached about 6.63-6.67 GB/s. Source: @rrickk420, 2026-08-22 P2P over native Gen2 x16 slots is about the same latency as a crossbar, around 1.5 us per transaction; switches add latency. Source: @wakeupmbrc1, 2026-10-17
Known issues
- Gen2 does not train under VFIO passthrough in some setups (Consensus-Protocol notes); and on 615.78.08 several
people saw Gen2 training fail and the cards drop off nvidia-smi (see Driver unlock).
- x4 after the cap mod: continuity faults on one lane pair drop the width; reflow the suspect caps and check with a
DMM. A card that failed the mod still works at x4. See Cooling and power for the mod and troubleshooting.
- ASPM idle link-speed drop (Gen2 to Gen1 at idle) to save power is an untested idea; nvidia-smi only guesses the link
state, lspci shows the truth. Source: @robbbbbb7973, 2026-10-21
Status
Ships in cmpunlocker and is reproduced by everyone who runs it (shares the Driver unlock confirmation), so Proven as a software unlock. Reaching Gen2 x16 additionally needs the capacitor mod.