Update, November 9, 2026: on November 6, 2026 the wiki moved mailbox P2P to Proven on both cards. A second owner reproduced the content-checked run, and the lab runs it in production on eight 8 GB cards. The text below is the November 3 post as published, when that status was Contested. Current status: P2P.
Peer-to-peer (P2P) transfers between CMP 170HX cards matter for tensor parallelism; without P2P, pipeline parallel is usually the better default on these PCIe-only cards. The wiki's P2P page separates verified transfers from false passes, and on October 27, 2026 a dual-socket server passed every cross-socket check.
BAR1 P2P: Proven on one root or one switch
BAR1 P2P needs the 64 GB BAR1 that the unlock opens. It is Proven, meaning reproduced by a second person with numbers, on boards that open that BAR1 on one root complex or behind one switch. The first results were @bayley_w's fork on August 8, 2026 and @turbine without kernel patches on August 13, 2026.
Across two root complexes at Gen2 x16, enabling P2P raised one-way bandwidth from 3.17 to 6.70 GB/s and bidirectional from 4.72 to 13.01 GB/s, and cut latency to 1.6 us, per @ropuls (October 2, 2026).
The bayley/cmpunlocker README records eight GPUs behind two PLX switches with all 56 directed pairs passing an alias-proof test. Cross-switch pairs ran at about 78% of same-switch speed, so keep tensor-parallel groups inside one switch where you can.
Mailbox P2P: Contested
The mailbox path works inside the stock 64 MB BAR1, but its results are Contested, meaning members disagree. bayley's README records a cleanly configured mailbox moving zero bytes, a published 6.69 GB/s mailbox figure was withdrawn after a content test, and the ForceP2P registry key alone only fakes P2P status.
The Morrowmake fork's --p2p build passed content checks on all 12 ordered pairs of a four-card rig at about 6.65 GB/s each way. curiouspixel's patch in it fixed P2P for @trustinter and @ghostinthedatacenter_87281 (October 7, 2026). The section stays Contested until a second content-checked mailbox run.
Across CPU sockets
Cross-socket P2P is Contested. On an Intel dual-root board P2P worked only between GPUs on the same PLX chip, per @skirtchaser (July 31, 2026), and @wakeupmbrc1 (October 18, 2026) said all PCIe lanes for a tensor-parallel group must come from one CPU.
The measured counterexample is Proven: on an eight-card dual-EPYC Supermicro H12DSG-O-CPU, the Morrowmake P2P build on 615.71.09 passed 504 of 504 content checks, including every cross-socket pair, with 0 Xids, per @darkmaniac7 (lab notes, October 27, 2026). The answer depends on the platform, so content-check your own.
Check it yourself
Use a destination-content test, not nvidia-smi topo output. About 14 us of latency means NCCL fell off P2P; the hardware path is about 1.5 us.
@gnasherrr's November 1, 2026 report of the Morrowmake fork working "out of the box" on an AM5 board at x8/x8 came without a content check, so it is Reported, the badge for one person's result.