Kate's public GA100VFI research changes what has been demonstrated on the 8 GB CMP 170HX: the author reports 80 GiB of usable memory on nine of ten examined cards, substantially more working SMs, faster PCIe and a two-card NVLink connection. Today's community discussion turned to reproducing that result, understanding individual cards and finding the hardware to connect them.
This November 11, 2026 roundup covers the new hardware findings, fresh Discord discussion and relevant software updates. Kate's article was published November 10. Discussion coverage runs through November 11 at 21:54 CST, equivalent to November 12 at 03:54 UTC, with earlier messages included for context. Stock card labels remain “8 GB” and “10 GB”; measured binary memory capacities below use GiB.
On this page: Kate's results · Today's discussion · Software updates · Buying and bench work · What needs testing next.
Kate's results: a new hardware route for 8 GB cards
In Using voltage glitching to unleash the A100 in my mining card, Kate describes hardware voltage fault injection followed by permanent fuse changes and software configuration. The accompanying GA100VFI repository is public. This is invasive hardware research, and the published method is not a software-only or reversible register unlock.
- Memory: Kate reports a functional 80 GiB framebuffer on nine of ten examined 8 GB specimens. The tenth had only 64 GiB intact. The report describes full-framebuffer pseudorandom testing after L2 cache invalidation, plus vLLM and other application workloads. These are the author's results; the small sample does not establish a success rate for every CMP card.
- Compute: approximately 120 to 126 functional SMs are reported, depending on the die. The displayed OpenCL output shows 124 compute units. The article's comparison table includes a 128-SM upper endpoint, but its displayed test output does not demonstrate a stable 128-SM card.
- Performance: the OpenCL FP16 half2 FMA benchmark reaches about 85.86 TFLOP/s, against about 50.13 for the software-unlocked CMP comparison and 72.49 for the listed retail A100. That is approximately 1.71 times and 1.18 times those particular results. It is not a Tensor Core benchmark or a measured LLM throughput improvement, and matched power and clock conditions across the comparisons are not supplied.
- PCIe: Gen3 and Gen4 operation are reported. Gen4 x16 also requires the lane-capacitor modification; the displayed PCIe benchmark is Gen3 x16.
- NVLink: a two-card topology shows NV12 in both directions after additional hardware and firmware work. The report does not supply measured NVLink throughput or establish a larger multi-card fabric.
- Still untested in the report: ECC, MIG, NVDEC and NVJPG. Their appearance in the capability discussion is not a completed functionality test.
The practical change is that recovering additional memory and compute on an 8 GB card now has a public hardware demonstration. The reviewed material still does not demonstrate a software-only 80 GiB unlock for that variant. The 10 GB cards have different memory constraints, so the nine-of-ten result cannot be applied to them. See 8 GB compute and HBM: limits and open questions for the longer research context.
Today's Discord discussion: useful clarifications and open claims
Kate's follow-up adds an important power caveat. Asked about consumption after unlocking the SMs and memory, @onemillionkates said she did not believe the card reported power correctly in that state and had not taken good measurements. That leaves efficiency and PSU sizing unresolved by the published benchmark. In a separate reply she said the settings are not universal and require considerable trial and error per die. Sources: @onemillionkates on power, November 11 and per-card tuning, November 11.
The public source received a test correction. @c133 flagged a bootloader test mismatch, and Kate replied that it should be fixed. Comparing the repository snapshots confirms changes to two test files, with the documentation and non-test implementation unchanged. This is a tooling correction, not another capacity or performance result. Sources: @c133's report, Kate's reply, and the reviewed source snapshot, November 11.
NVLink topology needs precise wording. On November 10, @zorg33 reported a “ring” on 10 GB cards. On November 11, the same author clarified that the cards were simply “chained” together. The captured discussion does not establish a closed ring, full mesh, NVSwitch compatibility or measured scaling. Bridge sourcing and custom layouts are active community work. Sources: @zorg33's initial report and the clarification. For established status, start with Unlock internals.
Driverless P2P is an early development report. @zagitta reported success on GA102 on November 10 and described CMP, Ada and other Ampere support as likely, with a future gpu-unlock 3.0 mentioned. That message does not demonstrate CMP 170HX support or a released feature. Sources: @zagitta's result and planned follow-up.
Defect-mask readings are useful, but 96 GiB remains speculation. Members are comparing disabled and defect-marked memory partitions, including competing explanations involving unused or dummy HBM sites. The captured discussion supplies no full-range 96 GiB CMP validation. @domrockt2 also explicitly labeled a four-card set of higher SM counts as hypothetical while reporting the cards still at 64 GiB and 74 SMs. Sources: @wakeupmbrc1's 96 GiB hypothesis, @n2dcrypt's alternative explanation, and @domrockt2's qualified census report. The first two messages were posted November 12 UTC, still November 11 in US Central time.
Software: driver status corrections and new inference releases
cmpunlocker: v0.5 remains the latest listed upstream release at this check. Proposals #67, bootstrap buffer safety, and #68, ECC handling on 10 GB cards, are closed without merge. Both closed November 10 UTC. This updates the open-PR description in our previous roundup; it does not mean the proposed fixes shipped or the reported issues were resolved. Kate's GA100VFI work is a separate project.
Project Maya: November 11 releases v1.1.59 and v1.1.60 add useful options for multi-card inference. The release notes describe memory-aware model recommendations, restoration of direct GPU-to-GPU prompt all-reduce for DeepSeek on supported NVIDIA tensor-parallel pairs, and a DeepSeek-V4.1-Flash EXL3 2.25 bpw setup option. That quant is listed at 158.6 GB of weights, about 160 GB of combined VRAM and RAM, with 192 GB recommended and 362 GB of disk including Engram tables. These are software placement budgets, not a pooled hardware framebuffer.
Maya v1.1.60 also adds optional DFlash2 drafting for GLM-5.3; its default MTP remained faster in the author's measurements. No CMP-specific before/after performance result accompanies these releases. The small speed improvement highlighted for v1.1.60 applies to AMD Ryzen AI Max APUs; the notes explicitly say NVIDIA performance is unchanged.
Strata: the latest listed release remains v0.2.13, published November 9. November 10 and 11 default-branch work includes GPU selection fixes and context-fit recommendations. Those commits should not be presented as a new November 11 release or a measured CMP speedup. The wiki's Engines page collects the broader options.
Buying and bench work: interest is ahead of verified services
Discord members discussed buying cards, sourcing bridges and arranging hardware work. @zagitta reported buying four more 8 GB cards at around $2,800 each on November 11; this is a member-reported purchase, with currency and complete transaction costs not specified in the message, rather than a market-wide price. Other messages asked for an EU modification service or offered future help conditional on first making the unlock work. Those are requests and intentions, not independently vetted services. Sources: @zagitta's purchase report, @matstatman's service request, and @neapopa's conditional offer. See Prices for the wiki's separately maintained history.
What needs testing next
The most useful follow-up is reproducible evidence from additional cards: full-range memory tests that exclude cache and aliasing artifacts, stable compute at the claimed SM count, external power measurements, and sustained application runs. NVLink needs topology and transfer measurements beyond enumeration. ECC, MIG and the media engines need their own functional tests.
Follow Developer status and what is next for the current research position, and use the Benchmark protocol when submitting comparable results.
Sources and coverage
- Kate's November 10 primary article and GA100VFI source snapshot, reviewed November 11.
- Fresh read-only Discord pull: 1,643 messages from eight public channels and threads active in the selected window. Specific authors and original messages are linked alongside each claim; Discord links require access to the server. The review excludes private tickets and moderation content.
- Primary cmpunlocker pull requests and release listing, Maya release notes, and Strata release and commit records linked above. Software state checked November 11 evening US Central time.