ImportBot: Software ECC on HBM and SRAM in cmpunlocker v0.5: what it sets, which counters are real vs intercepted, and the open question of whether it corrects errors. Discord Oct 2026.; sources: @_j3ns, @alanoo, @zarquon3157, @zombielurker, @ichundes, @darkmaniac7, @arabus_74064; GitHub amoghmunikote/cmpunlocker

2026-10-30T10:02:03Z

Software ECC on HBM and SRAM in cmpunlocker v0.5: what it sets, which counters are real vs intercepted, and the open question of whether it corrects errors. Discord Oct 2026.; sources: @_j3ns, @alanoo, @zarquon3157, @zombielurker, @ichundes, @darkmaniac7, @arabus_74064; GitHub amoghmunikote/cmpunlocker

← Older revision		Revision as of 10:02, 30 October 2026
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	The counterpoint: with ECC enabled an unstable card '''crashes with an Xid instead of silently generating garbage''',		The counterpoint: with ECC enabled an unstable card '''crashes with an Xid instead of silently generating garbage''',
	which is itself useful. {{Source\|ichundes\|2026-10-07\|https://discord.com/channels/1518634379604136178/1518695289278566450/1557350680342298647}}		which is itself useful. {{Source\|ichundes\|2026-10-07\|https://discord.com/channels/1518634379604136178/1518695289278566450/1557350680342298647}}

			{{Status\|Proven}} The hardware half does change state. On one 8 GB card, with three other cards as controls, the hardware part of the patch landed all 14 protected writes, <code>FEATURE_READOUT</code> (<code>0x823814</code>) went from <code>0x00000233</code> to <code>0xec8ff233</code> (DRAM ECC bit 16 set), <code>FBPA_ECC_CTRL</code> (<code>0x9a0470</code>) went from 0 to <code>0x41</code>, and a 60 GiB write/verify passed with ECC on. This shows the bits flip, not that errors are corrected, and it contradicts an earlier write-up that the ECC readout is latched at power-on. How to test real correction: [[Memory errors and ECC]]. {{Source\|handle=darkmaniac7\|date=2026-10-19\|note=lab notes}}

	Treat ECC as "reported enabled and surfaces errors", not proven to correct VRAM bit errors.		Treat ECC as "reported enabled and surfaces errors", not proven to correct VRAM bit errors.

ImportBot: Software ECC on HBM and SRAM in cmpunlocker v0.5: what it sets, which counters are real vs intercepted, and the open question of whether it corrects errors. Discord Oct 2026.; sources: @_j3ns, @alanoo, @zarquon3157, @zombielurker, @ichundes, @arabus_74064; GitHub amoghmunikote/cmpunlocker

2026-10-30T08:04:15Z

New page

{{Unlock
|unlocks=ECC (DRAM and SRAM)
|variant=both
|driver_version=nvidia-open 610+ (cmpunlocker v0.5)
|unlock_build=amoghmunikote/cmpunlocker v0.5
|steps_page=ECC
|status=Reported
|tested_by=_j3ns
|source=https://github.com/amoghmunikote/cmpunlocker
}}

Software-based ECC landed in [[Driver unlock|cmpunlocker]] v0.5 on 2026-10-04 and is credited to Amogh. It is one of
the main reasons prices rose after the release. {{Source|_j3ns|2026-10-04|https://discord.com/channels/1518634379604136178/1518692084729511967/1556439155360407583}}
It is '''not''' in the [[cmpunlocker forks|Morrowmake P2P fork]]; you cannot have both ECC and that fork's P2P from one
install today.

== What it sets ==

ECC is native on HBM2e and is a separate thing from VRAM capacity; the patch does not change usable memory.
{{Source|alanoo|2026-10-05|https://discord.com/channels/1518634379604136178/1518695328008638516/1556643131091583018}}
The MR4 write in the commit targets bits 1:0 (DM/ECC mode) of an HBM2e mode register. The CMP's HBM may be fused rather
than keyed; a Samsung HBM2 part may need a different config than an HBM2e part.
{{Source|zarquon3157|2026-10-05|https://discord.com/channels/1518634379604136178/1518695328008638516/1556730503657295994}}

Three patches: <code>ecc-enable.patch</code> (feature override <code>0x0082380c = 0x00999999</code>,
<code>0x00823810 = 0x003ffebf</code>, <code>0x0082382c = 0x0000000f</code>, ECC control
<code>0x009a0470 = 0x00000041</code>, LTCG dstcfg0 <code>0x0017e318 = 0x00000001</code>), <code>ecc-fbpa-static.patch</code>
(forces <code>bEnabledEccFBPA = NV_TRUE</code> for <code>0x20c2</code>/<code>0x2082</code>) and
<code>ecc-reporting.patch</code> (wires the counters through <code>escape.c</code>). (From the cmpunlocker patch set.)

== The counters ==

An investigation of which RM controls <code>nvidia-smi</code> uses found the counters are mostly '''real''', served by
GSP, not hardcoded:

* Served by GSP (real): <code>0x20803400</code> ECC_GET_CLIENT_EXPOSED_COUNTERS, <code>0x20803401</code>
ECC_GET_VOLATILE_COUNTS, <code>0x20803404</code> ECC_GET_REPAIR_STATUS.
* Intercepted: <code>0x20800133</code> GPU_QUERY_ECC_CONFIGURATION ("Enabled" hardcoded),
<code>0x2080014b</code> GET_INFOROM_OBJECT_VERSION (ECC object "6.16"), <code>0x2080012f</code> legacy status
(zeroed), <code>0x20803406</code> UNREPAIRABLE_MEMORY_FLAG (0).

Ago saw the ECC counter increase on an SRAM error in the NVIDIA Prometheus exporter, consistent with real counters.
{{Source|alanoo|2026-10-13|https://discord.com/channels/1518634379604136178/1518695328008638516/1559521944024387685}}

== Does it correct errors? (contested) ==

{{Status|contested}} On a card with about 5,000 single-bit and some multi-bit errors per 5-minute
<code>memtest_vulkan</code> run, enabling ECC did not correct any of them, and <code>gpu-burn</code> behaved the same;
no one showed a corrected-error counter moving. {{Source|zombielurker|2026-10-05|https://discord.com/channels/1518634379604136178/1518692084729511967/1556515369286504489}}
The counterpoint: with ECC enabled an unstable card '''crashes with an Xid instead of silently generating garbage''',
which is itself useful. {{Source|ichundes|2026-10-07|https://discord.com/channels/1518634379604136178/1518695289278566450/1557350680342298647}}
Treat ECC as "reported enabled and surfaces errors", not proven to correct VRAM bit errors.

== Why keep it on ==

Xid 48/172 uncorrectable ECC errors in GPC0 traced to an over-aggressive undervolt; lowering the voltage offset fixed
it. Keeping ECC on turned a silent-corruption problem into a clean crash that could be diagnosed, even after 170tune's
stability test passed. {{Source|ichundes|2026-10-07|https://discord.com/channels/1518634379604136178/1518695289278566450/1557350219111342183}}
See [[Cooling and power]] and [[Troubleshooting]].

== Known issues ==

* No performance impact on bandwidth is reported from ECC; one decode regression after the 0.4 to 0.5 move was suspected
to be ECC but not confirmed (see [[Driver unlock]]).
* ECC also reports "enabled" on unrelated cards (5060, 3050, 3090) after the unlock, which may be reporting only.
{{Source|arabus_74064|2026-10-05|https://discord.com/channels/1518634379604136178/1518692084729511967/1556465749948629003}}

== Status ==

Enabled and reproduced by others (68x live on master; MistyAshHole ran it clean for 25 h), so "enabled" is
{{Status|Proven}}; whether it corrects VRAM errors is {{Status|Contested}}. See the confirmation below.

== Related ==

[[Driver unlock]], [[cmpunlocker forks]], [[Cooling and power]], [[Troubleshooting]], [[Tools]].

{{ImportFooter}}
[[Category:Unlocks]]
[[Category:8 GB]]
[[Category:10 GB]]

ECC - Revision history